Ans: Final year students of BE(EC,CE,IT), MTech(VLSI, CE,IT) Students, and Professionals working in a VLSI industry having design, verification, debug, or post silicon validation experience require to learn PCIe protocol can join the course. No prior knowledge of SV, UVM or Verification is required. Course covers specification in a way to give overall idea for all the domain students and professionals.
Ans: PCIe is widely used protocol in servers, desktop, and mobile platforms. Product based VLSI companies like Intel, AMD, Broadcom, Qualcomm, SanDisk, Apple, and Rambus has IP level and SoC level teams working on front hand design and verification of PCIe protocols. They need people who can design and verify PCIe protocol-based applications. This course is designed to help verification engineers or students to give perspective in terms of verifying the complete PCIe express protocol at IP and SoC level. Professionals can get an idea about how to develop the PCIe Root Complex and End Point VIPs. Also, debugging and verification planning of PCIe Design. It helps people who are involved in PCIe card validation and drivers development as well.
Ans: There are three PCIe courses provided by an institute at the moment. It is designed to take care of students and professional’s requirements. All the courses can be taken individually or if prerequisite of the course matches. Fees for all the courses are different and can be discussed with an institute.
- PCIe Basic Course: Suitable for prospective participants who does not have any prior PCIe protocol knowledge. It covers all the topics of from PCISIG PCIe Gen3 and Gen4 specifications. Also, It covers the PCIe SoC level test plan. Detailed topics covered can be viewed under course page of the website. This course covers all the front end verification aspects of PCIe protocol. There is no hands on coding is involved. Trainer will explain the pseudo code of all the components of PCIe protocol.
- PCIe Advanced Course: Suitable for prospective participants who have basic knowledge of PCIe Gen3 specification. They want to learn advanced server related topics like SR_IOV, MR_IOV or NVMe specification. Those are designed for people working in an server industry. Companies like Intel and IBM has requirements of verifying these protocols in their server products. Detailed topics covered can be viewed under course page of website.
- PCIe TL, DL, PL Layer Test plan Course: Designed for front end verification professionals to understand all the scenarios must be covered in verifying the PCIe Gen3 and Gen4 RTL modules at IP level. It covers all the basic and error scenarios in detail for TL, DL and PL Layers verification. It helps verification engineers to understand all the features covered by PCIe protocol as scenarios cover each and every line of PCI SIG verification.
Ans: All PCIe courses are conducted by industry professional trainer having more than 7 years of PCIe protocol verification and validation experience. All PCIe courses will be provided in weekends on Saturday and Sunday Only. Batch duration will be 3 hours on Saturday and 3 hours on Sunday. Start time of all the PCIe protocol batches will be mentioned in website whenever new course batch is started. For further queries, you can fill up the course inquiry form. Institute will get back to you as soon as possible.
- Basic Course Duration: Basic course will go for 4-5 weekends.
- Advanced Course Duration: Advanced Course will go for 3-4 weekends.
- PCIe TL, DL, PL Layer Test plan course duration: Test plan course will go for 2-3 weekends.
Ans: Every course will have different set of material provided at end of the course. Also, current practise is to add participant of training to WhatsApp group dedicated to that batch. Once course is completed then participants of that course can ask questions throughout the life in that WhatsApp group. Questions will be answered by PCIe experts after 6 PM in an evening in weekdays and weekends.
A) PCIe Basic Course Material:
i) PCIe Gen3 and Gen4 PCISIG Specification.
ii) PCIe protocol mindshare book.
iii) PCIe Gen3 and Gen4 PPTs presented during the course.
iv) PCIe TL, DL and PL Layer assignments.
v) PCIe SoC level verification test plan
vi) PCIe Gen3 and Gen4 interview questions with answers.
B) PCIe Advanced Course Material:
i) PCIe SR_IOV, MR_IOV and NVMe course PPTs.
ii) PCIe SR_IOV, MR_IOV and NVMe PCISIG specification and assignments.
C) PCIe TL, DL, PL Layer Test plan Course Material:
i) PCIe Gen3 and Gen4 TL, DL and PL Layer IP level test plan excel sheet.
ii) Document indicating the verification strategy followed for verifying the PCIe Root Complex, End Point and Switch device.
Ans: Recording of every session of the course are provided in skype for 30 days. If enrolled students for that course cannot join few sessions due to any reason, then they can go through the recorded videos of that session. If enrolled participant has any doubts then they can ask questions in course related WhatsApp group or during the next session. All their queries will be resolved before starting the next session.
Ans: Enrolled students or professionals can ask questions related to topic covered in session at the end of the session or in next sessions. Or, If enrolled participants gets any queries after going through specification or recordings then can be added in WhatsApp group. Also, once course ends then participants can utilize the WhatsApp group for asking protocol queries throughout the life.
Ans: PCIe protocol is very vast in terms covering so many different aspects. It takes minimum 6 months for team of 12-13 PCIe protocol expert engineers to develop the complete verification environment or verification IP to verify all the features of PCIe RTL. It requires minimum 3 months of training course to develop the PCIe Root Complex, End Point and Switch verification IPs from scratch. PCIe expert trainer will go through the requirements and industry standard verification strategies used to verify different PCIe devices at IP level and SoC level. Trainer will provide pseudo code of test bench which can be taken as reference as developing future PCIe verification solutions. Also, enrolled students and professionals can ask any questions related to various methods followed by industry experts for verifying the PCIe protocol designs. There are plans to add the PCIe VIP testcase development and debug labs in future courses offered by an Institute. But, Those courses will have higher fees and duration.
Ans: The best way to know about the start dates of different courses is to follow the course schedule page of website. Alternatively, future participants interested in any of the courses can fill up the form on Contact US page adding the query in the comment section. Any new batch started by an Institute will be notified to prospective participants who has fill up the form on Contact US page. All the courses offered by an institute has different fees structure. Future participants interested in any of the course can inquire about the course fees by filling out form on Contact US page. All the major payment methods are accepted by an Institute.
Ans: Trainer has vast experience of 11 years in front-end ASIC verification domain. Also, He has worked in industry-level projects in PCIe protocol verification and test bench development for 5 years. He has worked as a lead for PCIe protocol verification in various VLSI projects.
Ans: Best suitable time for the PCIe course, payment, or fees-related inquiry is after 6:00 PM in an evening during weekdays. After 2:00 PM in the evening on weekends. The most preferred way to contact an institute for these queries is by filling out the form on the Contact US page on the website. You can add your query in the comment section. Institute will get in touch with you as early as possible. Another preferred way is to drop a query on WhatsApp at +91 6351368904 number. You will get the reply by 7:00 PM in the evening. Contacting via the phone call can be used as the last resource or in case of urgency.
Ans: Training will be conducted online via Skype call. Course material will be shared via an e-mail with registered participants after receiving the full payment of the course. Downloading training videos and screen recording the training sessions is illegal and strictly prohibited according to institute policy. Training videos can be viewed online in Skype for 30 days. After that, videos will be automatically deleted.
Ans: Yes, Demo video links of all the courses provided by institute is provided as part of course page. You can click on any of the course from the drop down menu. Every course has their separate link for demo video. Participants are advised to watch the demo video of courses before registering for any course provided by institute.
Ans: Yes, Students or Professionals can pay course fees in 2-3 instalments depending upon the course duration and total fees amount. It is mandatory to pay half fees of the course before joining the first session itself. Rest of the fees can be paid after 2 or 3 weeks depending on the total duration of the course. But Course material will not be provided unless and until the complete course fees is paid to an institute. Participants must pay complete fees before the last week of the training. Otherwise, participants will be removed from Skype and WhatsApp group without providing course material. Also, future course related technical queries will not be answered by an institute.
Ans: Most of the courses provided by an institutes are tailored made for getting jobs in the VLSI industry. Those are designed to give complete idea of verification and validation practices followed in an industry. Institute will forward resumes of all the students to recruiters at end of the course. Shortlisted profiles by an industry recruiters will be called for an interview. But, Institute will not conduct any on-campus placement drives. Trainers will provide an interview questions related to the courses asked by industry experts before making hiring decisions.
Ans: Blogs are added in website related to latest trends in the VLSI industry. These blogs are added by experienced industry professionals having expertise in front end verification and validation. Its main purpose is to provide industry insights to college graduates and entry level professionals. Also, some of the blogs are targeted towards giving brief introduction about usage of some of the protocols or architecture in an industry. New blog will be added at end of every month. These blogs can be forwarded to other students and professionals in case those are beneficial to them.
Ans: In case, enrolled participants refer a few of their colleagues or friends for future batches then the institute may give them a referral bonus on the basis of the number of referred participants. Also, In the case of a group of 3-4 friends, classmates or colleagues joining in the same batch are eligible for group discounts as well. Contact institute on +91 6351368904 to know referral and group discount policies in detail.
Ans: Institute has plans of adding online e-learning courses in near future for PCIe Gen5,Gen6 and CXL Protocol Training, AXI3 and AXI4 Protocol Training, UVM Methodology Professional Training(Complete Verification Test bench), System Verilog Professional Training(Complete Verification Test bench Solution), Intel and AMD IA32 Architecture Overview and Assembly Language Programming, ARM CPU Architecture and Programming Overview, ASIC IP and SoC Verification Approaches, Ethernet and USB 3.0/4.0 Protocol Training. New courses will be added in course schedule page as soon as batches started by an institute.
